Following the Moore's law, the key size of semiconductor device trend to be smaller. However, the leakage current is gradually increased, seriously affecting the electrical properties and the reliability of the device. For example, as line width of a gate becomes smaller, the leakage current between the source/drain/gate/silicon substrate of the CMOS device is gradually increasing. At present, there is still a lack of effective means to reduce the leakage current in the manufacturing process of a conventional CMOS semiconductor device.
Referring to FIGS. 1-7, which are schematic views illustrating a shallow trench etching process using a hard mask in the prior art. As shown in the FIGS. 1-7, a shallow trench etching process in the prior art, comprising the steps of:
1) forming a pad oxide layer 11, a silicon nitride hard mask layer 12, a BARC layer 13, and a photoresist layer 14 on a substrate 10 in turn, patterning the photoresist layer 14, and then etching the BARC layer 13 by using the patterned photoresist layer 14 as a mask, as shown in the FIG. 1;
2) etching the silicon nitride hard mask layer 12, as shown in the FIG. 2;
3) over etching the silicon nitride hard mask layer 12, as shown in the FIG. 3;
4) removing the photoresist layer 14, as shown in the FIG. 4;
5) removing the oxide generated when the photoresist layer is removed, as shown in the FIG. 5;
6) smoothly etching the top 15 of the shallow trench, as shown in the FIG. 6;
7) etching the shallow trench 18, as shown in the FIG. 7.
In the above mentioned shallow trench etching process, the removal of silicon nitride in the over-etching step (step 3) also causes the top of the silicon substrate to be etched to form a recess 15, resulting in a partial loss of silicon. In addition, the conditions commonly used in this step, such as high bias power and low etching gases, trend to the formation of a sharp corner 16 in the bottom of the recess 15. However, the presence of the sharp corner 16 will result in a significant increase in leakage current. And once the sharp corner 16 is formed, the sharp corner 16 cannot be completely eliminated even if the bottom of the recess 15 is smoothly etched (step 6), as shown in the FIGS. 6-7.
Therefore, it is necessary to provide a novel method of shallow trench etching to reduce the leakage current.